Hello,
I want to Write CHIP for CA3083 IC. It is a five-transistor NPN array, not a powered digital IC.
Before writing a safe .chip file, one essential hardware question needs to be resolved:
Does the Vetus fixture provide per-pin current limiting / external resistor paths for analog transistor testing? The CA3083 is rated for up to 100 mA collector current, but direct digital output pins must not be used to force transistor junctions without known current limiting. Its base-emitter reverse-voltage limit is only 5 V, so an uncontrolled digital pin test could damage the IC.
Any thoughts on this would be helpful.
No, there is no current limiting on the default board. Using it for anything other than digital testing could damage it that's why adjustments had to be made for add-on boards. The pins are parasitic so the pins with the bodge wire are for boards like that, of which, unfortunately I don't have any designed yet. If you ever want to design one all the info should be there for you to do so. I can also work on one for you if you give me an idea of what you would like in an analog board.
@nivbot Thanks for fast reply. I'll set that one aside for now. It sounds like the CA3083 IC family needs a custom fixture. Maybe later.
I'm plowing through a box of old IC's to see what we can do here. Let's hold on new boards and fixtures for now. I want to see what can be done with the base board. Maybe a hybrid board that supports more than one set of needs for various chip family families.
It's a really neat product. 🙂
I'm glad you like it. It looks like you're forging straight ahead.